IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 36

no-image

IDT82P2288BB

Manufacturer Part Number
IDT82P2288BB
Description
TXRX T1/J1/E1 8CHAN 256-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
Transceiverr
Datasheet

Specifications of IDT82P2288BB

Protocol
IEEE 1149.1
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
82P2288BB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT82P2288BB
Manufacturer:
IDT
Quantity:
6
Part Number:
IDT82P2288BB
Manufacturer:
IDT
Quantity:
917
Part Number:
IDT82P2288BB
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P2288BB8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P2288BBG
Manufacturer:
IDT
Quantity:
28
Part Number:
IDT82P2288BBG
Manufacturer:
WYC
Quantity:
3 000
Part Number:
IDT82P2288BBG
Manufacturer:
IDT Integrated Device Technolo
Quantity:
135
Part Number:
IDT82P2288BBG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82P2288BBG
Manufacturer:
XILINX
0
Part Number:
IDT82P2288BBG
Manufacturer:
IDT
Quantity:
20 000
Part Number:
IDT82P2288BBG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
T1 Digital Multiplexer (DM) Format (T1 only)
up of 12 frames. Each frame consists of one overhead bit (F-bit) and 24
8-bit channels. Except for channel 24, all other channels carry data.
Channel 24 should be ‘0DY11101’. Its Frame Alignment Pattern is
‘100011011100’ in the F-bit. The fixed 6 bits in channel 24 are called
DDS.
Table 14: The Structure of T1 DM
Functional Description
IDT82P2288
Note:
In Channel 24, the ‘D’ bit is used for data link, and the ‘Y’ bit is used for alarm. The other 6 bits are fixed and they are called ‘DDS’ pattern.
The structure of T1 DM is illustrated in Table 14. The T1 DM is made
Frame No. In The T1 DM
10
12
11
1
2
3
4
5
6
7
8
9
Ft
1
0
1
0
1
0
F-Bit (Frame Alignment)
36
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
DDSC bit. When the DDSC bit is ‘0’, the T1 DM synchronization is
acquired if one correct DDS pattern is received before the first F-bit of a
single correct Frame Alignment Pattern. When the DDSC bit is ‘1’, the
T1 DM synchronization is acquired if a single correct Frame Alignment
Pattern is received and twelve correct DDS patterns before each F-bit of
the correct Frame Alignment Pattern are all detected.
RMFBI bit is set at the first bit of each T1 DM frame.
The synchronization criteria of T1 DM format are selected by the
The T1-DM synchronization is indicated by ‘0’ in the OOFV bit. The
Fs
0
0
1
1
1
0
Channel 24
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
0DY11101
March 04, 2009

Related parts for IDT82P2288BB