IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 35

• Manufacturer Part Number: IDT82P2288BB
• Description: TXRX T1/J1/E1 8CHAN 256-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2288BB

• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2288BB

Extended Super Frame (ESF) Format
made up of 24 frames. Each frame consists of one overhead bit (F-bit)
and 24 8-bit channels. The F-bit in Frame (4n) (0<n<7) is for Frame
Alignment; the F-bit in Frame (2n-1) (0<n<13) is for Data Link; and the
F-bit in Frame (4n-2) (0<n<7) is for CRC checking.
(4n) (0<n<7). The same pattern is a mimic pattern if it is received in the
data stream other than F-bit. The synchronization criteria of ESF format
is selected by the MIMICC bit. When the MIMICC bit is set to ‘1’, the
Table 13: The Structure of ESF
Functional Description
IDT82P2288
Frame No. In The ESF
The structure of T1/J1 ESF is illustrated in Table 13. The ESF is
The Frame Alignment Pattern is ‘001011’, which is located in Frame
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Frame Alignment
0
0
1
0
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
F-Bit Assignment
Data Link
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
-
-
-
-
-
-
-
-
-
-
-
-
35
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
ESF synchronization is acquired if four consecutive Frame Alignment
Patterns are detected error free in the received data stream without a
mimic pattern. When the MIMICC bit is set to ‘0’, the ESF synchroniza-
tion is acquired if a single correct Frame Alignment Pattern and a single
correct CRC-6 based on this correct Frame Alignment Pattern are
found. In this case, the existence of mimic patterns is ignored. If a mimic
pattern exists during the frame searching procedure, the MIMICI bit will
be set to indicate the presence of a mimic pattern.
RMFBI bit is set at the first bit of each ESF frame.
The ESF synchronization is indicated by ‘0’ in the OOFV bit. The
CRC
C1
C2
C3
C4
C5
C6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Data Bit
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
The Bit In Each Channel
Signaling Bit
March 04, 2009
A (bit 8)
B (bit 8)
C (bit 8)
D (bit 8)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-