EP4CE40F29C8N Altera, EP4CE40F29C8N Datasheet - Page 171

• Manufacturer Part Number: EP4CE40F29C8N
• Description: IC CYCLONE IV FPGA 40K 780FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE40F29C8N

• Number Of Logic Elements/cells: 39600
• Number Of Labs/clbs: 2475
• Total Ram Bits: 1134000
• Number Of I /o: 532
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
© December 2010 Altera Corporation
f
Table 8–2. Uncompressed Raw Binary File (.rbf) Sizes for Cyclone IV Devices (Part 2 of 2)
Use the data in
configuration file formats, such as Hexadecimal (.hex) or Tabular Text File (.ttf)
formats, have different file sizes. However, for any specific version of the Quartus II
software, any design targeted for the same device has the same uncompressed
configuration file size. If you use compression, the file size varies after each
compilation, because the compression ratio depends on the design.
For more information about setting device configuration options or creating
configuration files, refer to the
Configuration Handbook.
Configuration and JTAG Pin I/O Requirements
Cyclone IV devices are manufactured using the TSMC 60-nm low-k dielectric process.
Although Cyclone IV devices use TSMC 2.5-V transistor technology in the I/O
buffers, the devices are compatible and able to interface with 2.5, 3.0, and 3.3-V
configuration voltage standards by following specific requirements.
All I/O inputs must maintain a maximum AC voltage of 4.1 V. When using a serial
configuration device in an AS configuration scheme, you must connect a 25- series
resistor for the DATA[0] pin. When cascading the Cyclone IV device family in a
multi-device configuration for AS, AP, FPP, and PS configuration schemes, you must
connect the repeater buffers between the master and slave devices for the DATA and
DCLK pins. When using the JTAG configuration scheme in a multi-device
configuration, connect 25- resistors on both ends of the TDO-TDI path if the TDO
output driver is a non-Cyclone IV device.
The output resistance of the repeater buffers and the TDO path for all cases must fit the
maximum overshoot equation shown in
Equation 8–1.
Note to
(1) Z
Notes to
(1) These values are preliminary.
(2) Only for the F484 package.
Cyclone IV GX
O
is the transmission line impedance and R
Equation
Table
8–2:
8–1:
(Note 1)
Table 8–2
Device
to estimate the file size before design compilation. Different
Software Settings
EP4CGX110
EP4CGX150
EP4CGX15
EP4CGX22
EP4CGX30
EP4CGX50
EP4CGX75
0.8Z O
E
is the equivalent resistance of the output buffer.

Equation
R E

1.8Z O
section in volume 2 of the
8–1.
Cyclone IV Device Handbook, Volume 1
24,500,000 (1),
Data Size (bits)
24,500,000
24,500,000
39,425,016
39,425,016
3,805,568
7,600,040
7,600,040
(1)
(1)
(2)
8–5