PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 48

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PIC18F67K22-I/MR

Manufacturer Part Number
PIC18F67K22-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F67K22-I/MR

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67K22-I/MRRSL
Manufacturer:
FSC
Quantity:
250
PIC18F87K22 FAMILY
3.3
Essentially, PIC18F87K22 family devices have these
independent clock sources:
• Primary oscillators
• Secondary oscillators
• Internal oscillator
The primary oscillators can be thought of as the main
device oscillators. These are any external oscillators
connected to the OSC1 and OSC2 pins, and include
the External Crystal and Resonator modes and the
External Clock modes. If selected by the FOSC<3:0>
Configuration bits (CONFIG1H<3:0>), the internal
oscillator block may be considered a primary oscillator.
The internal oscillator block can be one of the following:
• 31 kHz LF-INTRC source
• 31 kHz to 500 kHz MF-INTOSC source
• 31 kHz to 16 MHz HF-INTOSC source
The particular mode is defined by the FOSC
Configuration bits. The details of these modes are
covered in
The secondary oscillators are external clock
sources that are not connected to the OSC1 or OSC2
pin. These sources may continue to operate, even
after the controller is placed in a power-managed
mode. PIC18F87K22 family devices offer the SOSC
(Timer1/3/5/7) oscillator as a secondary oscillator
source. This oscillator, in all power-managed modes, is
often the time base for functions, such as a Real-Time
Clock (RTC).
The SOSC can be enabled from any peripheral that
requests it. There are eight ways the SOSC can be
enabled: if the SOSC is selected as the source by any
of the odd timers, which is done by each respective
SOSCEN bit (TxCON<3>), if the SOSC is selected as
the RTCC source by the RTCOSC Configuration bit
(CONFIG3L<1>), if the SOSC is selected as the CPU
clock source by the SCS bits (OSCCON<1:0>) or if the
SOSCGO bit is set (OSCCON2<3>). The SOSCGO bit
is used to warm up the SOSC so that it is ready before
any peripheral requests it.
The secondary oscillator has three Run modes. The
SOSCSEL<1:0> bits (CONFIG1L<4:3>) decide the
SOSC mode of operation:
• 11 = High-power SOSC circuit
• 10 = Digital (SCLKI) mode
• 01 = Low-power SOSC circuit
If a secondary oscillator is not desired and digital I/O on
port pins, RC0 and RC1, is needed, the SOSCSEL bits
must be set to Digital mode.
DS39960D-page 48
Clock Sources and
Oscillator Switching
Section 3.5 “External Oscillator
Modes”.
In addition to being a primary clock source in some
circumstances, the internal oscillator is available as a
power-managed mode clock source. The LF-INTOSC
source is also used as the clock source for several
special features, such as the WDT and Fail-Safe Clock
Monitor. The internal oscillator block is discussed in
more detail in
Block”.
The PIC18F87K22 family includes features that allow
the device clock source to be switched from the main
oscillator, chosen by device configuration, to one of the
alternate clock sources. When an alternate clock
source is enabled, various power-managed operating
modes are available.
3.3.1
The OSC1/OSC2 oscillator block is used to provide the
oscillator modes and frequency ranges:
The crystal-based oscillators (XT, HS and LP) have a
built-in start-up time. The operation of the EC and
EXTRC clocks is immediate.
3.3.2
The
(OSCCON2<1:0>), select the clock source. The avail-
able clock sources are the primary clock defined by the
FOSC<3:0> Configuration bits, the secondary clock
(SOSC oscillator) and the internal oscillator. The clock
source changes after one or more of the bits is written
to, following a brief clock transition interval.
The
(OSCCON<6>) bits indicate which clock source is
currently providing the device clock. The OSTS bit
indicates that the Oscillator Start-up Timer (OST) has
timed out and the primary clock is providing the device
clock in primary clock modes. The SOSCRUN bit indi-
cates when the SOSC oscillator (from Timer1/3/5/7) is
providing the device clock in secondary clock modes.
In power-managed modes, only one of these bits will
be set at any time. If neither of these bits is set, the
INTRC is providing the clock, or the internal oscillator
has just started and is not yet stable.
The IDLEN bit (OSCCON<7>) determines if the device
goes into Sleep mode or one of the Idle modes when
the SLEEP instruction is executed.
EXTRC
Mode
System
OSTS
HS
EC
LP
XT
OSC1/OSC2 OSCILLATOR
CLOCK SOURCE SELECTION
(OSCCON<3>)
Clock
Section 3.6 “Internal Oscillator
 2009-2011 Microchip Technology Inc.
Design Operating Frequency
0 to 64 MHz (external clock)
0 to 4 MHz (external RC)
Select
100 kHz to 4 MHz
4 MHz to 25 MHz
31.25-100 kHz
and
bits,
SOSCRUN
SCS<1:0>

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