PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 262

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

features. They are:
PIC18F87K22 FAMILY
In addition to the expanded range of modes available
through the CCPxCON and ECCPxAS registers, the
ECCP modules have two additional registers associated
with Enhanced PWM operation and auto-shutdown
• ECCPxDEL – Enhanced PWM Control
• PSTRxCON – Pulse Steering Control
20.1
The Enhanced CCP module may have up to four PWM
outputs, depending on the selected operating mode.
The CCPxCON register is modified to allow control
over four PWM outputs: ECCPx/PxA, PxB, PxC and
PxD. Applications can use one, two or four of these
outputs.
The outputs that are active depend on the ECCP
selected operating mode. The pin assignments are
summarized in
To configure the I/O pins as PWM outputs, the proper
PWM mode must be selected by setting the PxM<1:0>
and CCPxM<3:0> bits. The appropriate TRIS direction
bits for the port pins must also be set as outputs.
20.1.1
The ECCP modules use Timers, 1, 2, 3, 4, 6, 8, 10 or 12,
depending on the mode selected. These timers are
available to CCP modules in Capture, Compare or PWM
modes, as shown in
TABLE 20-1:
DS39960D-page 262
Capture
Compare
PWM
ECCP Mode
ECCP Outputs and Configuration
ECCP MODULE AND TIMER
RESOURCES
Table
ECCP MODE – TIMER
RESOURCE
Timer2, Timer4, Timer6, Timer8,
Table
20-3.
Timer10 or Timer12
20-1.
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
The assignment of a particular timer to a module is
determined by the timer to ECCP enable bits in the
CCPTMRSx register
between the two modules are depicted in
Capture operations are designed to be used when the
timer is configured for Synchronous Counter mode.
Capture operations may not work as expected if the
associated timer is configured for Asynchronous Counter
mode.
20.1.2
The pin assignment for ECCPx (Capture input,
Compare and PWM output) can change, based on
device configuration. The ECCPMX (CONFIG3H<1>)
Configuration bit determines which pins ECCP1 and
ECCP3 are multiplexed to.
• Default/ECCPMX = 1:
• ECCPMX = 0:
The pin assignment for ECCP2 (Capture input,
Compare and PWM output) can change, based on the
device configuration.
The CCP2MX Configuration bit (CONFIG3H<0>)
determines which pin ECCP2 is multiplexed to.
• If CCP2MX = 1 (default) – ECCP2 is multiplexed
• If CCP2MX = 0 – ECCP2 is multiplexed to RE7
- ECCP1 (P1B/P1C) is multiplexed onto RE6
- ECCP3 (P3B/P3C) is multiplexed onto RE4
- ECCP1 (P1B/P1C) is multiplexed onto RH7
- ECCP3 (P3B/P3C) is multiplexed onto RH5
to RC1
and RE5
and RE3
and RH6
and RH4.
ECCP PIN ASSIGNMENT
 2009-2011 Microchip Technology Inc.
(Register
20-2). The interactions
Figure
20-1.