PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 20

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 1-3:
DS39960D-page 20
RE0/RD/P2D
RE1/WR/P2C
RE2/CS/P2B/CCP10
RE3/P3C/CCP9/REFO
RE4/P3B/CCP8
RE5/P1C/CCP7
RE6/P1B/CCP6
RE7/ECCP2/P2A
Legend: TTL = TTL compatible input
Note 1:
RE0
RD
P2D
RE1
WR
P2C
RE2
CS
P2B
CCP10
RE3
P3C
CCP9
REFO
RE4
P3B
CCP8
RE5
P1C
CCP7
RE6
P1B
CCP6
RE7
ECCP2
P2A
2:
3:
4:
Pin Name
(3,4)
(4)
(4)
(4
(3)
ST = Schmitt Trigger input with CMOS levels
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
(2)
2
C = I
= Input
= Power
PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C™/SMBus
Pin Number Pin
QFN/TQFP
64
63
62
61
60
59
2
1
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
Buffer
Type
TTL
TTL
TTL
S/T
S/T
S/T
S/T
S/T
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
PORTE is a bidirectional I/O port.
Digital I/O.
Parallel Slave Port read strobe.
EECP2 PWM Output D.
Digital I/O.
Parallel Slave Port write strobe.
ECCP2 PWM Output C.
Digital I/O.
Parallel Slave Port chip select.
ECCP2 PWM Output B.
Capture 10 input/Compare 10 output/PWM10 output.
Digital I/O.
ECCP3 PWM Output C.
Capture 9 input/Compare 9 output/PWM9 output.
Reference clock out.
Digital I/O.
ECCP3 PWM Output B.
Capture 8 input/Compare 8 output/PWM8 output.
Digital I/O.
ECCP1 PWM Output C.
Capture 7 input/Compare 7 output/PWM7 output.
Digital I/O.
ECCP1 PWM Output B.
Capture 6 input/Compare 6 output/PWM6 output.
Digital I/O.
Capture 2 input/Compare 2 output/PWM2 output.
ECCP2 PWM Output A.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
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DD
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