PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 422

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
28.3.2
The difference in the two regulators’ operation arises
with Sleep mode. The ultra low-power regulator gives
the device the lowest current in the Regulator Enabled
mode.
The on-chip regulator can go into a lower power mode,
when the device goes to Sleep, by setting the REGSLP
bit (WDTCON<7>). This puts the regulator in a Standby
mode so that the device consumes much less current.
The on-chip regulator can also go into the Ultra Low-
Power mode, which consumes the lowest current
possible with the regulator enabled. This mode is
controlled by the RETEN bit (CONFIG1L<0>) and
SRETEN bit (WDTCON<4>).
TABLE 28-3:
DS39960D-page 422
Note 1:
Regulator
Enabled
Enabled
Enabled
Enabled
Enabled
x = Indicates that V
OPERATION OF REGULATOR IN
SLEEP
SLEEP MODE REGULATOR SETTINGS
Ultra Low-Power mode (Sleep)
Normal Operation (Sleep)
Low-Power mode (Sleep)
Normal Operation (Sleep)
Low-Power mode (Sleep)
IT
status is invalid.
Power Mode
WDTCON<7>
The various modes of regulator operation are shown in
Table
When the ultra low-power regulator is in Sleep mode,
the internal reference voltages in the chip will be shut
off and any interrupts referring to the internal reference
will not wake up the device. If the BOR or LVD is
enabled, the regulator will keep the internal references
on and the lowest possible current will not be achieved.
When using the ultra low-power regulator in Sleep
mode, the device will take about 250  s, typical, to start
executing the code after it wakes up.
VREGSLP
(1)
0
1
0
1
x
28-3.
WDTCON<4>
 2009-2011 Microchip Technology Inc.
SRETEN
x
x
0
0
1
CONFIG1L<0>
RETEN
1
1
x
x
0