PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 416

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
REGISTER 28-12: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
DS39960D-page 416
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
EBTR7
R/C-1
2:
3:
(1,3)
This bit is available only on PIC18F67K22 and PIC18F87K22 devices.
For the memory size of the blocks, see
Enable the corresponding CPx bit to protect the block from external read operations.
EBTR7: Table Read Protection bit
1 = Block 7 is not protected from table reads executed in other blocks
0 = Block 7 is protected from table reads executed in other blocks
EBTR6: Table Read Protection bit
1 = Block 6 is not protected from table reads executed in other blocks
0 = Block 6 is protected from table reads executed in other blocks
EBTR5: Table Read Protection bit
1 = Block 5 is not protected from table reads executed in other blocks
0 = Block 5 is protected from table reads executed in other blocks
EBTR4: Table Read Protection bit
1 = Block 4 is not protected from table reads executed in other blocks
0 = Block 4 is protected from table reads executed in other blocks
EBTR3: Table Read Protection bit
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
EBTR2 : Table Read Protection bit
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
EBTR6
R/C-1
(1,3)
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
EBTR5
R/C-1
(1,3)
EBTR4
R/C-1
(3)
(1,3)
(1,3)
(1,3)
(1,3)
(3)
(3)
(3)
Figure 28-6
(1,3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EBTR3
R/C-1
(3)
EBTR2
R/C-1
 2009-2011 Microchip Technology Inc.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
x = Bit is unknown
EBTR1
R/C-1
(3)
EBTR0
R/C-1
bit 0
(3)