PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 275

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PIC18F67K22-I/MR

Manufacturer Part Number
PIC18F67K22-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F67K22-I/MR

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67K22-I/MRRSL
Manufacturer:
FSC
Quantity:
250
20.4.6
In half-bridge applications, where all power switches are
modulated at the PWM frequency, the power switches
normally require more time to turn off than to turn on. If
both the upper and lower power switches are switched
at the same time (one turned on and the other turned
off), both switches may be on for a short period until one
switch completely turns off. During this brief interval, a
very high current (shoot-through current) will flow
through both power switches, shorting the bridge supply.
To avoid this potentially destructive shoot-through
current from flowing during switching, turning on either of
the power switches is normally delayed to allow the
other switch to completely turn off.
In Half-Bridge mode, a digitally programmable
dead-band delay is available to avoid shoot-through
current from destroying the bridge power switches. The
delay occurs at the signal transition from the non-active
state to the active state. For an illustration, see
Figure
ECCPxDEL register
period in terms of microcontroller instruction cycles
(T
FIGURE 20-15:
 2009-2011 Microchip Technology Inc.
CY
Standard Half-Bridge Circuit (“Push-Pull”)
or 4 T
20-14. The lower seven bits of the associated
OSC
PROGRAMMABLE DEAD-BAND
DELAY MODE
).
(Register
EXAMPLE OF HALF-BRIDGE APPLICATIONS
20-4) set the delay
PxA
PxB
FET
Driver
FET
Driver
PIC18F87K22 FAMILY
FIGURE 20-14:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
2: Output signals are shown as active-high.
(1)
Pulse Width
td
PR2 register.
Load
Period
td
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
+
V
-
+
V
-
(1)
DS39960D-page 275
Period
(1)

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