PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 245

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PIC18F67K22-I/MR

Manufacturer Part Number
PIC18F67K22-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F67K22-I/MR

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67K22-I/MRRSL
Manufacturer:
FSC
Quantity:
250
19.0
PIC18F87K22 family devices have seven CCP
(Capture/Compare/PWM) modules, designated CCP4
through CCP10. All the modules implement standard
Capture, Compare and Pulse-Width Modulation (PWM)
modes.
REGISTER 19-1:
 2009-2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
Note 1:
Note:
R/W-0
PxM1
2:
CAPTURE/COMPARE/PWM
(CCP) MODULES
indicates the item’s association with the
control register is named CCPxCON and
The CCP9 and CCP10 modules are not available on devices with 32 Kbytes of program memory
(PIC18FX5K22).
CCPxM<3:0> = 1011 will only reset the timer and not start AN A/D conversion on CCPx match.
Throughout this section, generic references
are used for register and bit names that are
the same, except for an ‘x’ variable that
specific CCP module. For example, the
refers to CCP4CON through CCP10CON.
PxM<1:0>: PWM Output Configuration bits
If CCPxM<3:2> = 00, 01, 10:
xx = PxA is assigned as a capture/compare input/output; PxB, PxC and PxD are assigned as port pins
If CCPxM<3:2> = 11:
00 = Single output: PxA, PxB, PxC and PxD are controlled by steering
01 = Full-bridge output forward: PxD is modulated; PxA is active; PxB, PxC are inactive
10 = Half-bridge output: PxA, PxB are modulated with dead-band control; PxC and PxD are assigned
11 = Full-bridge output reverse: PxB is modulated; PxC is active; PxA and PxD are inactive
DCxB<1:0>: PWM Duty Cycle bit 1 and bit 0 for CCPx Module
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight
Most Significant bits (DCx<9:2>) of the duty cycle are found in CCPRxL.
R/W-0
PxM0
as port pins
CCPxCON: CCPx CONTROL REGISTER (CCP4-CCP10 MODULES)
W = Writable bit
‘1’ = Bit is set
DCxB1
R/W-0
DCxB0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K22 FAMILY
CCPxM3
R/W-0
Each CCP module contains a 16-bit register that can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP4,
but is equally applicable to CCP5 through CCP10.
Note:
(2)
The CCP9 and CCP10 modules are
disabled on the devices with 32 Kbytes of
program memory (PIC18FX5K22).
CCPxM2
R/W-0
(2)
x = Bit is unknown
CCPxM1
R/W-0
DS39960D-page 245
(2)
(1)
CCPxM0
R/W-0
bit 0
(2)

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