PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 177

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 12-7:
TABLE 12-8:
 2009-2011 Microchip Technology Inc.
PORTD
LATD
TRISD
PADCFG1
ODCON1
Legend: Shaded cells are not used by PORTD.
Note 1:
RD3/PSP3/AD3
RD4/PSP4/
AD4/SDO2
RD5/PSP5/
AD5/SDI2/
SDA2
RD6/PSP6/
AD6/SCK2/
SCL2
RD7/PSP7/
AD7/SS2
Legend:
Note 1:
Pin Name
Name
2:
Unimplemented on PIC18F6XK22 devices, read as ‘0’.
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
I
The Parallel Slave Port (PSP) is available only in Microcontroller mode.
This feature is available only on PIC18F8XK22 devices.
2
C = I
SSP1OD
TRISD7
LATD7
RDPU
2
Bit 7
RD7
Function
PORTD FUNCTIONS (CONTINUED)
C™/SMBus Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PSP3
PSP4
PSP5
PSP6
PSP7
AD3
AD4
AD5
AD6
AD7
SDO2
SDA2
SCK2
SCL2
SDI2
RD3
RD4
RD5
RD6
RD7
SS2
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
CCP2OD
TRISD6
LATD6
REPU
Bit 6
RD6
Setting
TRIS
0
1
x
x
0
1
x
x
0
0
1
x
x
1
0
0
1
x
x
0
1
0
1
0
1
x
x
1
CCP1OD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TRISD5
RJPU
O
O
O
O
O
O
O
O
P
LATD5
I
I
I
I
I
I
I
I
I
Bit 5
RD5
(1)
Type
DOG
DIG
TTL
TTL
DIG
TTL
TTL
DIG
TTL
TTL
DIG
TTL
TTL
DIG
DIG
DIG
TTL
TTL
TTL
I
I
I/O
ST
ST
ST
ST
ST
ST
ST
2
2
C
C
TRISD4
LATD4
Bit 4
LATD<3> data output.
PORTD<3> data input.
Parallel Slave Port data.
External Memory Address/Data 3.
LATD<4> data output.
PORTD<4> data input.
Parallel Slave Port data.
External Memory Address/Data 4.
SPI data output (MSSP module).
LATD<5> data output.
PORTD<5> data input.
Parallel Slave Port data.
External Memory Address/Data 5.
SPI data input (MSSP module).
I
LATD<6> data output.
PORTD<6> data input.
Parallel Slave Port data.
External Memory Address/Data 6.
SPI clock output (MSSP module); takes priority over port data.
SPI clock input (MSSP module).
I
I
setting.
LATD<7> data output.
PORTD<7> data input.
Parallel Slave Port data.
External Memory Address/Data 7.
Slave select input for MSSP module.
RD4
2
2
2
—
—
C data input (MSSP module). Input type depends on module setting.
C clock output (MSSP module); takes priority over port data.
C clock input (MSSP module). Input type depends on module
PIC18F87K22 FAMILY
TRISD3
LATD3
Bit 3
RD3
—
—
RTSECSEL1 RESECSEL0
TRISD2
LATD2
Description
Bit 2
RD2
—
TRISD1
LATD1
Bit 1
RD1
—
DS39960D-page 177
SSP2OD
TRISD0
LATD0
Bit 0
RD0
—