PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 249

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
19.1.1
The CCP modules utilize Timers, 1 through 8, which
vary with the selected mode. Various timers are avail-
able to the CCP modules in Capture, Compare or PWM
modes, as shown in
TABLE 19-2:
TABLE 19-3:
 2009-2011 Microchip Technology Inc.
Note 1:
Note 1:
C4TSEL
C8TSEL
<1:0>
<1:0>
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
2:
CCP Module Configuration
Compare
Compare
Capture/
Capture/
Do not use the reserved bits.
The module is not available for devices with 32 Kbytes of program memory (PIC18F65K22 and
PIC18F85K22).
Do not use the reserved setting.
CCP8
CCP4
CCP MODULES AND TIMER
RESOURCES
TMR1
TMR7
TMR7
TMR1
TMR3
TMR3
Mode
Mode
Reserved
Reserved
TIMER ASSIGNMENTS FOR CCP MODULES 4, 5, 6 AND 7
TIMER ASSIGNMENTS FOR CCP MODULES 8, 9 AND 10
Table
TMR2
TMR4
TMR6
Mode
TMR2
TMR4
TMR6
PWM
Mode
PWM
(2)
(1)
19-1.
C8TSEL
C5TSEL0
Devices with 32 Kbytes
<1:0>
0 0
0 1
1 0
1 1
0
1
Compare
Capture/
CCP8
TMR1
TMR1
TMR1
Compare
Capture/
Mode
CCP5
Reserved
TMR1
TMR5
Mode
CCPTMRS2 Register
CCPTMRS1 Register
TMR2
TMR4
TMR6
Mode
PWM
(2)
TMR2
TMR4
Mode
PWM
C9TSEL0
C6TSEL0
PIC18F87K22 FAMILY
0
1
TABLE 19-1:
The assignment of a particular timer to a module is
determined by the timer to CCP enable bits in the
CCPTMRSx
Register
once and may share the same timer resource if they
are configured to operate in the same mode
(Capture/Compare or PWM) at the same time.
The CCPTMRS1 register selects the timers for CCP
modules, 7, 6, 5 and 4, and the CCPTMRS2 register
selects the timers for CCP modules, 10, 9 and 8. The
possible configurations are shown in
Table
Capture
Compare
PWM
0
1
CCP Mode
CCP9
Compare
Capture/
19-3.
TMR1
TMR7
Compare
Mode
Capture/
CCP6
19-3). All of the modules may be active at
TMR1
TMR5
Mode
(1)
registers
TMR2
TMR4
Mode
PWM
Timer1, Timer3, Timer 5 or Timer7
Timer2, Timer4, Timer 6 or Timer8
CCP MODE – TIMER
RESOURCE
TMR2
TMR2
Mode
PWM
C10TSEL0
Timer Resource
(see
C7TSEL
<1:0>
0 0
0 1
1 0
1 1
0
1
Register 19-2
CCP10
DS39960D-page 249
Compare
Compare
Capture/
Capture/
CCP7
TMR1
TMR5
TMR5
TMR5
TMR1
TMR7
Mode
Table 19-2
Mode
(1)
TMR2
TMR2
TMR2
TMR4
TMR6
TMR8
Mode
Mode
PWM
PWM
and
and