PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 260

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
REGISTER 20-1:
DS39960D-page 260
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
R/W-0
PxM1
PxM<1:0>: Enhanced PWM Output Configuration bits
If CCPxM<3:2> = 00, 01, 10:
xx = PxA is assigned as capture/compare input/output; PxB, PxC and PxD are assigned as port pins
If CCPxM<3:2> = 11:
00 = Single output: PxA, PxB, PxC and PxD are controlled by steering (see
01 = Full-bridge output forward: PxD is modulated; PxA is active; PxB, PxC are inactive
10 = Half-bridge output: PxA, PxB are modulated with dead-band control; PxC and PxD are
11 = Full-bridge output reverse: PxB is modulated; PxC is active; PxA and PxD are inactive
DCxB<1:0>: PWM Duty Cycle Bit 1 and Bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in CCPRxL.
CCPxM<3:0>: ECCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match
0011 = Capture mode
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every fourth rising edge
0111 = Capture mode: every 16
1000 = Compare mode: initialize ECCPx pin low, set output on compare match (set CCPxIF)
1001 = Compare mode: initialize ECCPx pin high, clear output on compare match (set CCPxIF)
1010 = Compare mode: generate software interrupt only, ECCPx pin reverts to I/O state
1011 = Compare mode: trigger special event (ECCPx resets TMR1 or TMR3, starts A/D conversion,
1100 = PWM mode: PxA and PxC are active-high; PxB and PxD are active-high
1101 = PWM mode: PxA and PxC are active-high; PxB and PxD are active-low
1110 = PWM mode: PxA and PxC are active-low; PxB and PxD are active-high
1111 = PWM mode: PxA and PxC are active-low; PxB and PxD are active-low
R/W-0
PxM0
Steering
assigned as port pins
CCPxCON: ENHANCED CAPTURE/COMPARE/PWMx CONTROL
sets CCPxIF bit)
W = Writable bit
‘1’ = Bit is set
Mode”)
DCxB1
R/W-0
DCxB0
th
R/W-0
rising edge
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
R/W-0
CCPxM2
R/W-0
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
CCPxM1
R/W-0
Section 20.4.7 “Pulse
CCPxM0
R/W-0
bit 0