HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 808

• Manufacturer Part Number: HD6417760BP200QS
• Description: IC SUPERH MCU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BP200QS

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

1. Philips Format
Rev. 2.00 Feb. 12, 2010 Page 724 of 1330
REJ09B0554-0200
Figures 20.2 and 20.3 show the supported Philips protocol both with padding and without.
Padding occurs when the data word length is smaller than the system word length.
Figure 20.4 shows the format used by Sony. Figure 20.5 shows the format used by Matsushita.
Padding is assumed in both cases, but may not be present in a final implementation if the
system word length equals the data word length.
SSI_SDATA
SSI_SCK
SSI_WS
SSI_SDATA
SSI_SCK
SSI_WS
SCKP = 0, SWSP = 0, DEL = 0, CHNL = 00, SPDP = 0, SDTA = 0
System word length > data word length
SCKP = 0, SWSP = 0, DEL = 0, CHNL = 00
System word length = data word length
prev. sample MSB
Figure 20.2 Philips Format (with no Padding)
MSB
Figure 20.3 Philips Format (with Padding)
Data word 1
System word 1
System word 1 =
data word 1
LSB
LSB
+ 1
Padding
LSB MSB
MSB
System word 2 =
data word 2
Data word 2
System word 2
LSB
+ 1
LSB
LSB next sample
Padding
Next