HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 892
HD6417760BP200QS
Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BP200QS
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 892 of 1418
- Download datasheet (9Mb)
Rev. 2.00 Feb. 12, 2010 Page 808 of 1330
REJ09B0554-0200
Bit
9
8
7
6
Bit Name
TST1
TST0
MCR7
⎯
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R
Description
Controls the Tx pin to output transmit data or
recessive bits. When this bit is enabled (cleared to
0), the internal transmit output value appears on
the Tx pin. When this bit is disabled (set to 1), the
Tx Output pin always remains recessive or Tx
value is internally looped back the internal Rx if
Enable Internal Loop = 1.
0: External Tx pin value is supplied for the CAN
1: Internal Loop Enable = 0: Tx is always
Enables/ disables the internal Tx looped back to
the internal Rx. For details, refer to 22.6
Operation.
0: Rx is fed from the Rx pin.
1: Rx is fed from the internal Tx signal.
Enables/disables the Auto wake mode. If this bit is
set, HCAN2 automatically cancels the Sleep
Mode (MCR5) by detecting CAN bus activity
(dominant bit). If MCR7 is cleared HCAN2 does
not automatically cancel the Sleep Mode.
0: HCAN2 does not automatically cancel
1: HCAN2 automatically cancels Sleep Mode
Reserved
The write value should always be 0. The read
value is not guaranteed.
Disable Tx Output
Enable Internal Loop
Auto- Wake Mode
Interface block.
recessive on the Tx pin.
Internal Loop Enable = 1: Tx is internally
looped back the internal Rx.
Sleep Mode.
when the CAN bus active is detected.
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