HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 775
HD6417760BP200QS
Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BP200QS
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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19.4.6
Figure 19.3 shows the format of data transfer from the master to the slave device (master data
transmit format). Figure 19.4 shows the data transfer format (master data receive format) in which
the master device read data on and after the second byte from the slave device.
Figure 19.5 shows the combination transfer format in which the data transfer direction changes
during one transfer.
When changing the direction at the first transfer, retransmit command (Sr), the slave address and
the R/W signal are transmitted. In this case, the R/W signal is set to the direction opposite to the
first transfer direction.
Note: * Transfer direction of data and acknowledge bits depend on R/W bits.
S
7-Bit Address Format
SLAVE ADDRESS
Figure 19.5 Combination Transfer Format of Master Transfer
S
S
:
:
SLAVE ADDRESS
SLAVE ADDRESS
From MASTER to SLAVE
From SLAVE to MASTER
Read or Write
Figure 19.3 Master Data Transmit format
Figure 19.4 Master Data Receive format
R/W
A DATA
0 (Write)
1 (Read)
R/W
R/W
+ACK.)*
(n bytes
A/A
A
A
Sr = Restart condition
Sr
DATA
A = ACKNOWLEDGE (SDA LOW)
A = NOT ACKNOWLEDGE (SDA HIGH)
S = Start condition
P = Stop condition
DATA
(n bytes + ACKNOWLEDGE)
(n bytes + ACKNOWLEDGE)
SLAVE ADDRESS
Data transferred
Data transferred
A
A
Rev. 2.00 Feb. 12, 2010 Page 691 of 1330
Read or Write
DATA
DATA
R/W
Direction of transfer
may change at this point
Section 19 I
A/A
A/A
A
DATA
P
P
+ACK.)*
(n bytes
REJ09B0554-0200
A/A
2
C Bus Interface
P
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