HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 769

• Manufacturer Part Number: HD6417760BP200QS
• Description: IC SUPERH MCU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BP200QS

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
1
0
Bit Name
RDF
TDFE
Initial Value
0
1
R/W
R/W
R/W
Description
Receive FIFO Data Full
Indicates that the receive data is transferred from
the shift register to ICRXD, and the byte count in
ICRXD reaches the receive trigger byte count set
in the RTRG3 to RTRG0 bits in ICFCR.
When RDF is set to 1, the receive operation
stops. Reading the receive data from ICRXD and
clearing RDF to 0 will resume a receive operation.
0: Indicates that the byte count in ICRXD is
[Clear conditions]
•
•
1: Indicates that the byte count in ICRXD reaches
[Set condition]
•
Transmit FIFO Data Empty
Indicates that the transmit data can be written to
ICTXD, the data is transferred from ICTXD to the
shift register, and the byte count in ICTXD is
equal to or smaller than the trigger byte count set
in the TTRG1 and TTRG0 bits of ICFCR.
0: Indicates that the byte count in ICTXD
[Clear condition]
•
1: Indicates that the byte count in ICTXD is
[Set conditions]
•
•
smaller than the receive trigger byte count.
the receive trigger byte count.
exceeds the transmit trigger byte count.
equivalent to or smaller than the transmit
trigger byte count.
Power-on reset, or manual reset
Reading from ICRXD has made the byte count
in ICRXD smaller than the receive trigger byte
count, and 0 is written to RDF.
The byte count in ICRXD exceeds the receive
trigger byte count.*
When the byte count in ICTXD exceeds the
transmit trigger byte count, and 0 is written to
the TDFE bit.
Power-on reset, or manual reset
The byte count in ICTXD becomes equivalent
to or smaller than the transmit trigger byte
count.*
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Rev. 2.00 Feb. 12, 2010 Page 685 of 1330
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Section 19 I
REJ09B0554-0200
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C Bus Interface