HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 735
HD6417760BP200QS
Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BP200QS
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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18.4.3
Only the internal clock generated by the on-chip baud rate generator can be used as the
transmission/reception clock in the smart card interface. The bit rate is set using SIBRR and
SISMPL, using the formula indicated below. Examples of bit rates are shown in table 18.4.
Here, when CKE0 = 1 is used to select the clock output, a clock signal is output from the
SIM_CLK pin with frequency equal to (SISMPL+1) times the bit rate.
Where
B: the bit rate (bits/s)
Pck: the operating frequency of the peripheral module [MHz]
S: the SISMPL setting (0 ≤ S ≤ 2047)
N: the SIBRR setting (0 ≤ N ≤ 7).
Table 18.4 Example of Bit Rates (bits/s) for SIBRR Settings (Pck = 33.3 MHz, SISMPL =
SIBRR Setting
7
6
5
4
3
2
1
0
B = Pck ×10
Clocks
371)
6
/ {(S+1) × 2 (N+1)}
SIM_CLK Frequency (MHz)
2.06
2.36
2.75
3.30
4.13
5.50
8.25
16.50
Rev. 2.00 Feb. 12, 2010 Page 651 of 1330
Bit Rate (bits/s)
5544
6336
7392
8871
11089
14785
22177
44355
REJ09B0554-0200
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