HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 228
HD6417760BP200QS
Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BP200QS
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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6.6.2
ITLB data array 1 is allocated to addresses H'F300 0000 to H'F37F FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification (when writing). Information for selecting the entry to be accessed is
specified in the address field, and PPN, V, SZ, PR, C, and SH to be written to the data array are
specified in the data field.
In the address field, bits [31:23] have the value H'F30 indicating ITLB data array 1 and the entry is
specified by bits [9:8].
In the data field, bits [28:10] indicate PPN, bit [8] indicates V, bits [7] and [4] indicate SZ, bit [6]
indicates PR, bit [3] indicates C, and bit [1] indicates SH.
The following two kinds of operation can be used on ITLB data array 1:
1. ITLB data array 1 read
2. ITLB data array 1 write
Rev. 2.00 Feb. 12, 2010 Page 144 of 1330
REJ09B0554-0200
PPN, V, SZ, PR, C, and SH are read into the data field from the ITLB entry corresponding to
the entry set in the address field.
PPN, V, SZ, PR, C, and SH specified in the data field are written to the ITLB entry
corresponding to the entry set in the address field.
ITLB Data Array 1
Address field
Data field
Figure 6.12 Memory-Mapped ITLB Address Array
31
31
1 1 1 1 0 0 1 0
VPN:
V:
E:
Virtual page number
Validity bit
Entry
24
23
VPN
ASID:
:
Address space identifier
Reserved bits (write value should be 0,
and read value is undefined )
10 9 8 7
10 9
9 8 7
E
V
ASID
0
0
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