HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 563

• Manufacturer Part Number: HD6417760BP200QS
• Description: IC SUPERH MCU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BP200QS

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 11 Direct Memory Access Controller (DMAC)
11.6.12 USB DMA Transfer
The USB contains an 8-Kbyte shared memory. It is possible to perform a DMA transfer between
the USB internal shared memory and synchronous DRAM by using the DMABRG.
Figure 11.39 shows a DMA transfer flow between the shared memory and synchronous DRAM.
On this transfer, specifying the transfer size and number of transfers is not needed. The DMABRG
converts the number of transfer bytes specified by the SZ bits in DMAURWSZ into the
appropriate transfer data size and the number of transfers to perform a DMA transfer. When the
number of bytes actually transferred reaches the number of transfer bytes specified by the SZ bits
in DMAURWSZ, the UTF bit in DMABRGCR is set to 1 and the DMA transfer is successfully
completed.
When the transfer is continued beyond the shared memory area (H'FE34 1000 to H'FE34 2FFF), a
USB address error is generated. When a USB address error is detected, the UAF bit in
DMABRGCR is set to 1 and operation ends abnormally.
Rev. 2.00 Feb. 12, 2010 Page 479 of 1330
REJ09B0554-0200