HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 301

IC SUPERH MCU ROMLESS 256BGA

HD6417760BP200QS

Manufacturer Part Number
HD6417760BP200QS
Description
IC SUPERH MCU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BP200QS

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
(4) IRQ Interrupts
• Source: The interrupt mask bit setting in SR is smaller than the IRL (3–0) level, and the BL bit
• Transition address: VBR + H'0000 0600
• Transition operations:
IRQ()
{
}
in SR is 0 (accepted at instruction boundary).
The PC contents immediately after the instruction at which the interrupt is accepted are set in
SPC. The SR and R15 contents at the time of acceptance are set in SSR and SGR.
The code corresponding to the interrupt source is set in INTEVT. The BL, MD, and RB bits
are set to 1 in SR, and a branch is made to VBR + H'0600. The IRQ interrupt levels should be
set as values between B'0000 and B'1111 in the interrupt priority level setting register 00
(INTPRI00) in the interrupt controller. For details, see section 9, Interrupt Controller (INTC).
SPC = PC;
SSR = SR;
SGR = R15;
INTEVT = H'0000 0800 – H'0000 0860;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = VBR + H'0000 0600;
Rev. 2.00 Feb. 12, 2010 Page 217 of 1330
REJ09B0554-0200

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