HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 507

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Mailbox Initial Settings: Mailboxes are held in RAM, and so their initial values are undefined
after power is supplied. Initial values must therefore be set in all the mailboxes (by writing 0s or
1s).
Mailbox Transmit/Receive Settings: The HCAN2 has 32 mailboxes. Mailbox 31 and 0 are
receive-only, while mailboxes 1 to 30 can be set for transmission or reception.
Use MBC[2:0] bits in the mailbox to set the corresponding mailbox for transmission or reception
use. When setting mailboxes for reception, in order to improve message reception efficiency,
high-priority messages should be set in mailboxes with high mailbox number.
Set MBC[2:0] bits of unused mailboxes to B'111 and do not access them.
Note: Restrictions apply to the use of the mailbox 31 for transmission. Carefully read section
15.8, Usage Notes.
Message Transmission Method Setting : The following two kinds of message transmission
methods are available.
• Transmission order determined by message identifier priority
• Transmission order determined by mailbox number priority
Either of the message transmission methods can be selected with the message transmission method
bit (MCR2) in the master control register (MCR): When messages are set to be transmitted
according to the message identifier priority, if several messages are designated as waiting for
transmission (TXPR = 1), depending on the settings of the message identifier, IDE, EXT-ID, and
RTR bit, the message with the highest priority (set values of the identifier, IDE, EXT-ID, and
RTR bit are low) is stored in the transmit buffer. CAN bus arbitration is then carried out for the
message stored in the transmit buffer, and the message is transmitted when the transmission right
is acquired. When the TXPR bit is set, the highest-priority message is found and stored in the
transmit buffer.
When messages are set to be transmitted according to the mailbox number proiority, if several
messages are designated as waiting for transmission (TXPR = 1), the message with the highest
mailbox number is stored in the transmit buffer. CAN bus arbitration is then carried out for the
message stored in the transmit buffer, and the message is transmitted when the transmission right
is acquired.
Rev. 2.00, 09/04, page 465 of 720

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