HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 156

• Manufacturer Part Number: HD64F7047F50
• Description: IC SUPERH MCU FLASH 256K 100QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

8.2.2
The DTC source address register (DTSAR) is a 32-bit register that specifies the DTC transfer
source address. Specify an even address in case the transfer size is word; specify a multiple-of-
four address in case of longword. The initial value is undefined.
8.2.3
The DTC destination address register (DTDAR) is a 32-bit register that specifies the DTC transfer
destination address. Specify an even address in case the transfer size is word; specify a multiple-
of-four address in case of longword. The initial value is undefined.
8.2.4
The DTC initial address register (DTIAR) is a 32-bit register that specifies the initial transfer
source/transfer destination address in repeat mode. In repeat mode, when the DTS bit is set to 1,
specify the initial transfer source address in the repeat area, and when the DTS bit is cleared to 0,
specify the initial transfer destination address in the repeat area. The initial value is undefined.
8.2.5
DTCRA is a 16-bit register that designates the number of times data is to be transferred by the
DTC. The initial value is undefined.
In normal mode, the entire DTCRA functions as a 16-bit transfer counter (1 to 65536). It is
decremented by 1 every time data is transferred, and transfer ends when the count reaches H'0000.
The number of transfers is 1 when the set value is H'0001, 65535 when it is H'FFFF, and 65536
when it is H'0000.
In repeat mode, DTCRAH maintains the transfer count and DTCRAL functions as an 8-bit
transfer counter. The number of transfers is 1 when the set value is DTCRAH = DTCRAL = H'01,
255 when they are H'FF, and 256 when it is H'00.
In block transfer mode, it functions as a 16-bit transfer counter. The number of transfers is 1 when
the set value is H'0001, 65535 when it is H'FFFF, and 65536 when it is H'0000.
8.2.6
The DTCRB is a 16-bit register that designates the block length in block transfer mode. The block
length is 1 when the set value is H'0001, 65535 when it is H'FFFF, and 65536 when it is H'0000.
The initial value is undefined.
Rev. 2.00, 09/04, page 114 of 720
DTC Source Address Register (DTSAR)
DTC Destination Address Register (DTDAR)
DTC Initial Address Register (DTIAR)
DTC Transfer Count Register A (DTCRA)
DTC Transfer Count Register B (DTCRB)