HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 369

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7047F50
Manufacturer:
RENESAS
Quantity:
4 000
Part Number:
HD64F7047F50MV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7047F50V
Manufacturer:
PANJIT
Quantity:
30 000
Part Number:
HD64F7047F50V
Manufacturer:
RENESAS
Quantity:
386
Part Number:
HD64F7047F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7047F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F7047F50V
Quantity:
2 070
Reading from TCNT, TCSR, and RSTCSR: TCNT, TCSR, and RSTCSR are read like other
registers. Use byte transfer instructions. The read addresses are H'FFFF8610 for TCSR,
H'FFFF8611 for TCNT, and H'FFFF8613 for RSTCSR.
11.6.2
If a timer counter increment clock pulse is generated during the T3 state of a write cycle to TCNT,
the write takes priority and the timer counter is not incremented. Figure 11.8 shows this operation.
11.6.3
If the values of bits CKS2 to CKS0 in the timer control/status register (TCSR) are rewritten while
the WDT is running, the count may not increment correctly. Always stop the watchdog timer (by
clearing the TME bit to 0) before rewriting the values of bits CKS2 to CKS0.
11.6.4
To prevent incorrect operation, always stop the watchdog timer (by clearing the TME bit to 0)
before switching between interval timer mode and watchdog timer mode.
TCNT Write and Increment Contention
Changing CKS2 to CKS0 Bit Values
Changing between Watchdog Timer/Interval Timer Modes
Address
Internal write
signal
TCNT input
clock
TCNT
Figure 11.8 Contention between TCNT Write and Increment
φ
TCNT write cycle
T 1
TCNT address
N
T 2
Counter write data
T 3
Rev. 2.00, 09/04, page 327 of 720
M

Related parts for HD64F7047F50