HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 350

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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10.9.2
Table 10.44 Pin Configuration
Table 10.45 shows output-level comparisons with pin combinations.
Table 10.45 Pin Combinations
10.9.3
The POE has the two registers. The input level control/status register 1 (ICSR1) controls both
POE0–POE3 pin input signal detection and interrupts. The output level control/status register
(OCSR) controls both the enable/disable of output comparison and interrupts.
Input Level Control/Status Register 1 (ICSR1): The input level control/status register (ICSR1)
is a 16-bit readable/writable register that selects the POE0 to POE3 pin input modes, controls the
enable/disable of interrupts, and indicates status.
Rev. 2.00, 09/04, page 308 of 720
Name
Port output enable input pins
Pin Combination
PE9/TIOC3B and PE11/TIOC3D
PE12/TIOC4A and PE14/TIOC4C
PE13/TIOC4B/MRES and
PE15/TIOC4D/IRQOUT
Pin Configuration
Register Configuration
Abbreviation
POE0–POE3
I/O
Output
Output
Output
Description
All high-current pins are made high-impedance
state when the pins simultaneously output low-level
for longer than 1 cycle.
All high-current pins are made high-impedance
state when the pins simultaneously output low-level
for longer than 1 cycle.
All high-current pins are made high-impedance
state when the pins simultaneously output low-level
for longer than 1 cycle.
I/O
Input
Description
Input request signals to make high-
current pins high-impedance state

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