HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 163

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Note:
8.3.3
Register information is stored in an on-chip RAM. When activated, the DTC reads register
information in an on-chip RAM and transfers data. After the data transfer, it writes updated
register information back to the RAM.
Pre-storage of register information in the RAM makes it possible to transfer data over any required
number of channels. The transfer mode can be specified as normal, repeat, and block transfer
mode. Setting the CHNE bit to 1 makes it possible to perform a number of transfers with a single
activation source (chain transfer).
The 32-bit DTSAR designates the DTC transfer source address and the 32-bit DTDAR designates
the transfer destination address. After each transfer, DTSAR and DTDAR are independently
incremented, decremented, or left fixed depending on its register information.
Activating
Source
Generator
Reserved
A/D converter
(CH1)
Reserved
SCI2
SCI3
SCI4
MMT
Reserved
HCAN2
Reserved
Software
*
DTC Operation
External memory, memory-mapped external devices, on-chip memory, on-chip
peripheral modules (excluding DTC)
Activating
Source
ADI1
RXI_2
TXI_2
RXI_3
TXI_3
RXI_4
TXI_4
TGN
TGM
RM1
Write to
DTCSR
DTC Vector
Address
H'00000438 to
00000443
H'00000444
H'00000446
H'00000448
H'0000044A
H'0000044C
H'0000044E
H'00000450
H'00000452
H'00000454
H'00000456
H'00000458
H'0000045A
H'0000045C to
H'0000049F
H'0400+
DTVEC[7:0]
DTE Bit
DTEE5
DTEE3
DTEE2
DTEE1
DTEE0
DTEF7
DTEF6
DTEF5
DTEF4
DTEF2
Transfer
Source
ADDR
RDR_2
Arbitrary*
RDR_3
Arbitrary*
RDR_4
Arbitrary*
Arbitrary*
Arbitrary*
Arbitrary*
Arbitrary*
Rev. 2.00, 09/04, page 121 of 720
Transfer
Destination Priority
Arbitrary*
Arbitrary*
TDR_2
Arbitrary*
TDR_3
Arbitrary*
TDR_4
Arbitrary*
Arbitrary*
Arbitrary*
Arbitrary*
High
Low

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