HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 209

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7047F50
Manufacturer:
RENESAS
Quantity:
4 000
Part Number:
HD64F7047F50MV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7047F50V
Manufacturer:
PANJIT
Quantity:
30 000
Part Number:
HD64F7047F50V
Manufacturer:
RENESAS
Quantity:
386
Part Number:
HD64F7047F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7047F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F7047F50V
Quantity:
2 070
Table 10.13 TIORL_0 (channel 0)
[Legend]
X: Don’t care
Notes: 1. The low level output is retained until TIOR contents is specified after a power-on reset.
Bit 3
IOC3
0
1
2. When the BFA bit in TMDR_0 is set to 1 and TGRC_0 is used as a buffer register, this
Bit 2
IOC2
0
1
0
1
setting is invalid and input capture/output compare is not generated.
Bit 1
IOC1
0
1
0
1
0
1
X
Bit 0
IOC0
0
1
0
1
0
1
0
1
0
1
X
X
TGRC_0
Function
Output
compare
register
Input
capture
register*
2
TIOC0C Pin Function
Output hold*
Initial output is 0
0 output at compare match
Initial output is 0
1 output at compare match
Initial output is 0
Toggle output at compare match
Output hold
Initial output is 1
0 output at compare match
Initial output is 1
1 output at compare match
Initial output is 1
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down
Description
1
Rev. 2.00, 09/04, page 167 of 720

Related parts for HD64F7047F50