HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 440

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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14.2
The CMT has the following registers for each channel. For details on register addresses and
register states during each processing, refer to appendix A, Internal I/O Register.
• Compare Match Timer Start Register (CMSTR)
• Compare Match Timer Control/Status Register_0 (CMCSR_0)
• Compare Match Timer Counter_0 (CMCNT_0)
• Compare Match Timer Constant Register_0 (CMCOR_0)
• Compare Match Timer Control/Status Register_1 (CMCSR_1)
• Compare Match Timer Counter_1 (CMCNT_1)
• Compare Match Timer Constant Register_1 (CMCOR_1)
14.2.1
The compare match timer start register (CMSTR) is a 16-bit register that selects whether to
operate or halt the channel 0 and channel 1 counters (CMCNT).
Rev. 2.00, 09/04, page 398 of 720
Bit
15 to 2 
1
0
Bit Name
STR1
STR0
Register Descriptions
Compare Match Timer Start Register (CMSTR)
Initial
Value
All 0
0
0
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Count Start 1
This bit selects whether to operate or halt compare match
timer counter_1.
0: CMCNT_1 count operation halted
1: CMCNT_1 count operation
Count Start 0
This bit selects whether to operate or halt compare match
timer counter_0.
0: CMCNT_0 count operation halted
1: CMCNT_0 count operation

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