DF2505FC26V Renesas Electronics America, DF2505FC26V Datasheet - Page 708

• Manufacturer Part Number: DF2505FC26V
• Description: IC H8S/2505 MCU FLASH 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505FC26V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 Controller Area Network (HCAN) [H8S/2556 Group]
When the interval between two transmissions, or between transmission and transmission
cancellation is same or shorter than following, condition 2 described in above is satisfied and
consequently error may occur.
Table 18.5 Interval Limitation between TXPR and TXPR or between TXPR and TXCR
Interval (which is for preventing error) is changed depending on the following conditions.
• The number of buffers (HCAN has 16 buffers)
• Data transmission: Mailbox (hereafter MB) number order, ID priority order
• HCAN operating clock
• CAN bus baud rate
• Bit timing (TSEG1, TSEG2)
• The number of MBs transmitted to the first TXPR and second TXPR
• The number of CPU accesses to MB in words or bytes after TXPR or TXCR set
Rev. 6.00 Sep. 24, 2009 Page 660 of 928
REJ09B0099-0600
Baud Rate (bps)
1 M
500 k
250 k
1st transmission
Idle state
setting
Sampling point
immediately before SOF
2nd transmission setting
or 1st transmission setting
cancellation
Figure 18.17 HCAN Transmit Procedure
SOF
Upper five bits of ID of the
transmit message selected
in the 1st transmission setting
Upper five bits of ID
Set Interval (μs)
50
50
50
Transmission
Lower six bits of ID of message
of the highest priority selected
in the 2nd transmission setting
and subsequent bits
Lower six bits of ID to EOF