DF2505FC26V Renesas Electronics America, DF2505FC26V Datasheet - Page 178

• Manufacturer Part Number: DF2505FC26V
• Description: IC H8S/2505 MCU FLASH 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505FC26V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 Bus Controller
7.3.4
BCRH selects enabling or disabling of idle cycle insertion, and the memory interface for area 0.
Rev. 6.00 Sep. 24, 2009 Page 130 of 928
REJ09B0099-0600
Bit
7
6
5
4
3
Bit Name
ICIS1
ICIS0
BRSTRM
BRSTS1
BRSTS0
Bus Control Register H (BCRH)
Initial
Value
1
1
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Idle Cycle Insertion 1
Selects whether or not one idle cycle state is to be
inserted between bus cycles when consecutive external
read cycles are performed in different areas.
0: Idle cycle is not inserted in case of consecutive
1: Idle cycle is inserted in case of consecutive external
Idle Cycle Insertion 0
Selects whether or not one idle cycle state is to be
inserted between bus cycles when consecutive external
read and write cycles are performed.
0: Idle cycle is not inserted in case of consecutive
1: Idle cycle is inserted in case of consecutive external
Burst ROM Enable
Selects whether area 0 is used as a burst ROM interface.
0: Area 0 is basic bus interface
1: Area 0 is burst ROM interface
Burst Cycle Select 1
Selects the number of burst cycles for the burst ROM
interface.
0: Burst cycle comprises 1 state
1: Burst cycle comprises 2 states
Burst Cycle Select 0
Selects the number of words that can be accessed in a
burst ROM interface burst access.
0: Max. 4 words in burst access
1: Max. 8 words in burst access
external read cycles in different areas
read cycles in different areas
external read and write cycles
read and write cycles