AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 87

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

16.4
Table 16-1.
16.4.1
Register Name:
Access Type:
• PIV: Periodic Interval Value
Defines the value compared with the primary 20-bit counter of the Periodic Interval Timer (CPIV). The period is equal to
(PIV + 1).
• PITEN: Period Interval Timer Enabled
0 = The Periodic Interval Timer is disabled when the PIV value is reached.
1 = The Periodic Interval Timer is enabled.
• PITIEN: Periodic Interval Timer Interrupt Enable
0 = The bit PITS in PIT_SR has no effect on interrupt.
1 = The bit PITS in PIT_SR asserts interrupt.
8549A–CAP–10/08
Offset
0x00
0x04
0x08
0x0C
31
23
15
–
–
7
Periodic Interval Timer (PIT) User Interface
Periodic Interval Timer Mode Register
Periodic Interval Timer (PIT) Register Mapping
Register
Mode Register
Status Register
Periodic Interval Value Register
Periodic Interval Image Register
30
22
14
PIT_MR
–
–
6
Read/Write
29
21
13
–
–
5
28
20
12
–
–
4
PIV
PIV
PIT_SR
Name
PIT_MR
PIT_PIVR
PIT_PIIR
27
19
11
–
3
26
18
10
–
2
Read/Write
Read-only
Read-only
Read-only
Access
PIV
PITIEN
25
17
9
1
AT91CAP7E
0x000F_FFFF
0x0000_0000
0x0000_0000
0x0000_0000
Reset Value
PITEN
24
16
8
0
87