AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet

MCU CAP7 FPGA 225LFBGA

AT91CAP7E-NA-ZJ

Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Datasheets

Specifications of AT91CAP7E-NA-ZJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91CAP7E-NA-ZJ
Manufacturer:
Atmel
Quantity:
10 000
AT91CAP7E is an ARM7™-based MCU with a direct FPGA interface, six-layer advanced high-speed
bus (AHB), peripheral DMA controller and 160 Kbytes of on-chip SRAM. It offers seamless migration to
AT91CAP7 customizable MCUs for ARM7-plus-FPGA designs. It includes on-chip peripherals such as
USB 2.0 full speed device, SPI master and slave, two USARTs, three 16-bit timer counters, an 8-channel/
10-bit analog to digital converter, plus a full-functioned system controller including interrupt and power
control and supervisory functions.
The FPGA interface on the AT91CAP7E provides the FPGA with direct access to the AT91CAP7E’s
on-chip AHB and peripheral DMA controller. This architecture eliminates FPGA-induced bus contention,
off-loads MCU-to-FPGA communications from the CPU, and frees up the external bus interface for
external memory access.
Interfacing an ARM7-based MCU to an FPGA has traditionally been done through the external bus
interface (EBI) or programmable I/O. Either arrangement requires that the CPU transfer data to and from
the FPGA one word-at-a-time, basically stealing CPU cycles that should be conserved for processing and
limiting access to external memory during FPGA operations.
The FPGA interface on Atmel’s AT91CAP7E provides the FPGA with two AHB masters, four AHB slaves,
a special direct AHB slave interface to an external RAM through the FPGA, and a programmable ROM
that remaps the external RAM to emulate and debug the ROM code. Fourteen advanced peripheral bus
(APB) slaves, two full-duplex DMA channels and 32-bit programmable I/O may be hardware selected to
share I/O. An on-chip priority interrupt controller provides up to 13 encoded interrupts and two additional
un-encoded interrupts for DMA transfers.
32K OSC
RC OSC
SHWDC
System Controller
AT91CAP7E
Main
PMC
AT91CAP7E
OSC
AIC
GPBREG
WDT
POR
PLL
POR
PLL
RTT
PIT
APB
Device
USB
JTAG
ICE
FS
ARM7TDMI
ROM (256KB)
SPI
PIO
SRAM
x32
96KB
AMBA Bridge
SRAM
64KB
Timer
x3
6 -layer AHB Matrix
USART
CAP
FPGA Interface
USART
TM
CUSTOMIZABLE MICROCONTROLLERS
Peripheral DMA
ADC
Controller
NAND Flash
Static Mem.
SDRAM
EBI
CF

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AT91CAP7E-NA-ZJ Summary of contents

Page 1

... FPGA one word-at-a-time, basically stealing CPU cycles that should be conserved for processing and limiting access to external memory during FPGA operations. The FPGA interface on Atmel’s AT91CAP7E provides the FPGA with two AHB masters, four AHB slaves, a special direct AHB slave interface to an external RAM through the FPGA, and a programmable ROM that remaps the external RAM to emulate and debug the ROM code ...

Page 2

... AT91CAP7E microcontroller. The logic blocks inside the FPGA are connected to the AT91CAP7E via the AHB master and slave channels. The AT91CAP7E is a standard microcontroller with an FPGA interface that makes the FPGA look and work like the internal bus on the MCU. Customers who are considering the AT91CAP7 customizable MCU for their designs, frequently need a two-chip, no-NRE, FPGA-plus ARM7 solution as they are gaining market momentum ...

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