AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 63

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.3.2
Figure 13-3. Application Test Environment Example
13.4
8549A–CAP–10/08
Debug and Test Pin Description
Test Environment
Figure 13-3 on page 63
preted by the tester. In this example, the “board in test” is designed using a number of JTAG-
compliant devices. These devices can be connected to form a single scan chain.
Table 13-1.
Pin Name
NRST
TST
TCK
TDI
TDO
TMS
NTRST
JTAGSEL
DRXD
DTXD
CAP7-based Application Board In Test
Connector
ICE/JTAG
Debug and Test Pin List
Interface
JTAG
CAP7
Chip n
shows a test environment example. Test vectors are sent and inter-
T est Adaptor
Function
Microcontroller Reset
Test Mode Select
Test Clock
Test Data In
Test Data Out
Test Mode Select
Test Reset Signal
JTAG Selection
Debug Receive Data
Debug Transmit Data
Chip 2
Chip 1
ICE and JTAG
Debug Unit
Reset/Test
Tester
Input/Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
AT91CAP7E
Active Level
High
Low
Low
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