AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 320

MCU CAP7 FPGA 225LFBGA

AT91CAP7E-NA-ZJ

Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Datasheets

Specifications of AT91CAP7E-NA-ZJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91CAP7E-NA-ZJ
Manufacturer:
Atmel
Quantity:
10 000
Figure 28-4. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 28-5. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
28.6.3
320
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(to slave)
AT91CAP7E
Master Mode Operations
SPCK
SPCK
MOSI
MISO
SPCK
SPCK
MOSI
MISO
NSS
NSS
* Not defined, but normally MSB of previous character received.
*
When configured in Master Mode, the SPI operates on the clock generated by the internal pro-
grammable baud rate generator. It fully controls the data transfers to and from the slave(s)
* Not defined but normally LSB of previous character transmitted.
MSB
1
1
MSB
MSB
MSB
2
2
6
6
6
6
3
3
5
5
5
5
4
4
4
4
4
4
5
5
3
3
3
3
6
6
6
2
2
2
2
7
7
1
1
1
1
8
8
LSB
LSB
LSB
LSB
8549A–CAP–10/08
*

Related parts for AT91CAP7E-NA-ZJ