AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 219

MCU CAP7 FPGA 225LFBGA

AT91CAP7E-NA-ZJ

Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Datasheets

Specifications of AT91CAP7E-NA-ZJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91CAP7E-NA-ZJ
Manufacturer:
Atmel
Quantity:
10 000
AT91CAP7E
Peripheral clocks 4 and 8 are enabled.
write_register(PMC_PCDR,0x00000010)
Peripheral clock 4 is disabled.
8. Enabling HClocks
Once all of the previous steps have been completed, the HClocks can be enabled and/or
disabled via registers; PMC_PCER and PMC_PCDR.
Depending on the system used, 4 HClocks can be enabled or disabled.
The PMC_PCSR register indicates which HClock is enabled.
HClock
Note:
Each enabled
corresponds to Master Clock.
Code Examples:
write_register(PMC_PCER,0x24000000)
HClocks 0 and 3 are enabled.
219
8549A–CAP–10/08

Related parts for AT91CAP7E-NA-ZJ