AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 507

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8549A–CAP–10/08
12 ARM7TDMI Processor Overview .......................................................... 55
13 CAP7E Debug and Test ......................................................................... 61
14 Reset Controller (RSTC) ........................................................................ 67
11.2System Requirements and Integration ..................................................................41
11.3Functional Description ...........................................................................................42
11.8Programmability Options .......................................................................................46
11.12Interfacing using PIO ...........................................................................................49
11.16Interfacing using EBI ...........................................................................................52
12.1Overview ...............................................................................................................55
12.2ARM7TDMI Processor ..........................................................................................55
13.1Overview ...............................................................................................................61
13.2Block Diagram .......................................................................................................61
13.3Application Examples ............................................................................................62
13.6Debug and Test Pin Description ............................................................................63
13.7Functional Description ...........................................................................................64
14.1Description ............................................................................................................67
14.2Block Diagram .......................................................................................................67
11.4.1Interface Modules 43
11.5.2Serializer Modules 43
11.6.3Serializer Programmability 44
11.7.4Transfer Timing 45
11.9.1Mode-Bits 46
11.10.2PIO Controller B Multiplexing 47
11.11.3Other MPIO Signal Assignments/Multiplexing 48
11.13.1PIO-FPGA Connections 50
11.14.2PIO-FPGA Access Routines 50
11.15.3PIO-FPGA Waveforms 51
11.17.1EBI-FPGA Connections 52
11.18.2EBI TIming 52
12.3.1Instruction Type 55
12.4.2Data Type 55
12.5.3ARM7TDMI Operating Mode 55
12.6.4ARM7TDMI Registers 56
12.7.5ARM Instruction Set Overview 58
12.8.6Thumb Instruction Set Overview 59
13.4.1Debug Environment 62
13.5.2Test Environment 63
13.8.1Test Pin 64
13.9.2Embedded In-circuit Emulator 64
13.10.3Debug Unit 64
13.11.4IEEE 1149.1 JTAG Boundary Scan 64
13.12.5ID Code Register 65
AT91CAP7E
507