AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 228

MCU CAP7 FPGA 225LFBGA

AT91CAP7E-NA-ZJ

Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Datasheets

Specifications of AT91CAP7E-NA-ZJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91CAP7E-NA-ZJ
Manufacturer:
Atmel
Quantity:
10 000
24.2.10.4
Register Name:
Access Type:
• PIDx: Peripheral Clock x Enable
0 = No effect.
1 = Enables the corresponding peripheral clock.
Note:
Note:
• HCKx: HClock x Output Enable
0 = No effect.
1 = Enables the corresponding HClock output.
Note:
228
PID23
PID15
PID7
31
23
15
7
-
PID2 to PID29 refer to identifiers as defined in
Programming the control bits of the Peripheral ID that are not implemented has no effect on the behavior of the PMC.
HCK0 - HCK3 correspond to PID26 - PID29 and therefore control the AHB clocks for the MP Block Master A, B, C, and D
respectively as defined in
AT91CAP7E
PMC Peripheral Clock Enable Register
PID22
PID14
PID6
30
22
14
6
-
PMC_PCER
Write-only
Section 10.2
HCK3(PID29)
PID21
PID13
PID5
29
21
13
5
Peripheral Identifiers.
HCK2(PID28)
Section 10.2
PID20
PID12
PID4
28
20
12
4
HCK1(PID27)
Peripheral Identifiers.
PID19
PID11
PID3
27
19
11
3
HCK0(PID26)
PID18
PID10
PID2
26
18
10
2
PID25
PID17
PID9
25
17
9
1
-
8549A–CAP–10/08
PID24
PID16
PID8
24
16
8
0
-

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