AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 329

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

28.7
Table 28-3.
8549A–CAP–10/08
0x004C - 0x00FC
0x004C - 0x00F8
0x100 - 0x124
1.Technically, the SPI_SR register is reset to 0x00000000. However, if the SPI clock is enabled, the value may be read as
0x000000F0 right after reset due to the value of the corresponding PDC-related status inputs for register bits 7 down to 4.
0x20 - 0x2C
Offset
0x0C
0x1C
0x3C
0x00
0x04
0x08
0x10
0x14
0x18
0x30
0x34
0x38
Serial Peripheral Interface (SPI) User Interface
SPI Register Mapping
Control Register
Mode Register
Receive Data Register
Transmit Data Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Chip Select Register 0
Chip Select Register 1
Chip Select Register 2
Chip Select Register 3
Reserved
Reserved
Reserved for the PDC
Register
Register Name
SPI_CSR0
SPI_CSR1
SPI_CSR2
SPI_CSR3
SPI_RDR
SPI_TDR
SPI_IMR
SPI_IDR
SPI_MR
SPI_IER
SPI_CR
SPI_SR
–
–
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read-only
Write-only
Read-only
Write-only
Write-only
Read-only
Access
–
–
AT91CAP7E
0x00000000
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
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