DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 83

IC H8S/2214 MCU FLASH 112-TFBGA

DF2214BQ16V

Manufacturer Part Number
DF2214BQ16V
Description
IC H8S/2214 MCU FLASH 112-TFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2214BQ16V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-TFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2214BQ16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(c) Instruction Set
All instructions and addressing modes can be used. Only the lower 16 bits of effective addresses
(EA) are valid.
(d) Exception Vector Table and Memory Indirect Branch Addresses
In normal mode the top area starting at H'0000 is allocated to the exception vector table. One
branch address is stored per 16 bits. The configuration of the exception vector table in normal
mode is shown in figure 2.2. For details of the exception vector table, see section 4, Exception
Handling.
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address included in the instruction code to specify a memory operand that
contains a branch address. In normal mode the operand is a 16-bit word operand, providing a 16-
bit branch address. Branch addresses can be stored in the top area from H'0000 to H'00FF. Note
that this area is also used for the exception vector table.
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
H'0006
H'0007
H'0008
H'0009
H'000A
H'000B
Figure 2.2 Exception Vector Table (Normal Mode)
Power-on reset exception vector
Manual reset exception vector
(Reserved for system use)
Exception vector 1
Exception vector 2
Rev.4.00 Sep. 18, 2008 Page 21 of 872
Exception
vector table
REJ09B0189-0400
Section 2 CPU

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