DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 12

• Manufacturer Part Number: DF2214BQ16V
• Description: IC H8S/2214 MCU FLASH 112-TFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2214BQ16V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-TFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Item
5.3.1 External
Interrupts
Figure 5.3 Timing
of Setting IRQnF
5.5.1 Contention
between Interrupt
Generation and
Disabling
5.5.5 IRQ
Interrupts
5.5.6 NMI Interrupt
Usage Notes
6.1.2 Block
Diagram
Figure 6.1 Block
Diagram of Bus
Controller
7.3.4 DMA Control
Register (DMACR)
Bits 10 to 7—
Reserved
Bit 4—Reserved
7.3.5 DMA Band
Control Register
(DMABCR)
Bits 10 and 8—
Reserved (DTA1A,
DTA0A)
7.5.4 Repeat Mode 217
Rev.4.00 Sep. 18, 2008 Page x of lx
REJ09B0189-0400
Page
100
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Revisions (See Manual for Details)
Note added
Note : n = 7 to 0
Description amended
When an interrupt enable bit is cleared to 0 to disable interrupt
requests, the disabling becomes effective after execution of the
instruction.
Newly added
Newly added
Legend added
Legend:
ABWCR : Bus width control register
ASTCR: Access state control register
BCRH: Bus control register H
BCRL: Bus control register L
WCRH: Wait state control register H
WCRL: Wait state control register L
Description added
Although these bits are readable/writable, only 0 should be written
here.
Description added
Although this bit is readable/writable, only 0 should be written
here.
Description added
Reserved bits in full address mode. Read and write possible.
Although these bits are readable/writable, only 0 should be written
here.
Description amended
Repeat mode can be specified by setting the RPE bit in DMACR
to 1, and clearing the DTIE bit in DMABCRL to 0.