DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 75

• Manufacturer Part Number: DF2214BQ16V
• Description: IC H8S/2214 MCU FLASH 112-TFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2214BQ16V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-TFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Type
System control
Interrupts
Address bus
Data bus
Bus control
External
expansion
Symbol
RES
MRES
STBY
BREQ
BACK
FWE
NMI
IRQ7 to
IRQ0
A23 to
A0
D15 to
D0
CS7 to
CS0
AS
RD
HWR
LWR
WAIT
EXIRQ7 to
EXIRQ0
EXMS
I/O
Input
Input
Input
Input
Output Bus request acknowledge: Indicates that the bus has been
Input
Input
Input
Output Address bus: These pins output an address.
I/O
Output Chip select: Signals for selecting areas 7 to 0.
Output Address strobe: When this pin is low, it indicates that
Output Read: When this pin is low, it indicates that the external
Output High write: A strobe signal that writes to external space and
Output Low write: A strobe signal that writes to external space and
Input
Input
Output External expansion module select: Select signal for external
Name and Function
power-on reset state.
the manual reset state.
Standby: When this pin is driven low, a transition is made to
hardware standby mode.
request to the H8S/2214.
released to an external bus master.
programming.
When this pin is not used, it should be fixed high.
Interrupt request 7 to 0: These pins request a maskable
interrupt.
address output on the address bus is enabled.
address space can be read.
indicates that the upper half (D15 to D8) of the data bus is
enabled.
indicates that the lower half (D7 to D0) of the data bus is
enabled.
when accessing external 3-state address space.
External expansion interrupt request 7 to 0: Input pins for
interrupt requests from external modules.
modules.
Reset input: When this pin is driven low, the chip enters the
Manual reset: When this pin is driven low, the chip enters
Bus request: Used by an external bus master to issue a bus
Flash write enable: Enables/disables flash memory
Nonmaskable interrupt: Requests a nonmaskable interrupt.
Data bus: These pins constitute a bidirectional data bus.
Wait: Requests insertion of a wait state in the bus cycle
Rev.4.00 Sep. 18, 2008 Page 13 of 872
Section 1 Overview
REJ09B0189-0400