DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 82
DF2214BQ16V
Manufacturer Part Number
DF2214BQ16V
Description
IC H8S/2214 MCU FLASH 112-TFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets
1.HS2214ECB62H.pdf
(938 pages)
2.HEWH8E10A.pdf
(19 pages)
3.D12312SVTE25V.pdf
(341 pages)
Specifications of DF2214BQ16V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-TFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2214BQ16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 CPU
• Higher speed
2.2
The H8S/2000 CPU has two operating modes: normal * and advanced. Normal mode supports a
maximum 64-kbyte address space. Advanced mode supports a maximum 16-Mbyte total address
space (architecturally a maximum 16-Mbyte program area and a maximum of 4 Gbytes for
program and data areas combined). The mode is selected by the mode pins of the microcontroller.
Note: * Not available in the H8S/2214 Group.
(1) Normal Mode (not available in the H8S/2214 Group)
The exception vector table and stack have the same structure as in the H8/300 CPU.
(a) Address Space
A maximum address space of 64 kbytes can be accessed.
(b) Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit segments
of 32-bit registers. When En is used as a 16-bit register it can contain any value, even when the
corresponding general register (Rn) is used as an address register. If the general register is
referenced in the register indirect addressing mode with pre-decrement (@–Rn) or post-increment
(@Rn+) and a carry or borrow occurs, however, the value in the corresponding extended register
(En) will be affected.
Rev.4.00 Sep. 18, 2008 Page 20 of 872
REJ09B0189-0400
⎯ Basic instructions execute twice as fast
Note: * Not available in the H8S/2214 Group.
CPU operating modes
CPU Operating Modes
Figure 2.1 CPU Operating Modes
Advanced mode
Normal mode*
Maximum 16-Mbytes for
program and data areas
combined
Maximum 64-kbytes, program
and data areas combined
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