DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 81

• Manufacturer Part Number: DF2214BQ16V
• Description: IC H8S/2214 MCU FLASH 112-TFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2214BQ16V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-TFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

There are also differences in the address space, CCR and EXR register functions, power-down
state, etc., depending on the product.
2.1.3
In comparison to the H8/300 CPU, the H8S/2000 CPU has the following enhancements.
• More general registers and control registers
• Expanded address space
• Enhanced addressing
• Enhanced instructions
• Higher speed
2.1.4
In comparison to the H8/300H CPU, the H8S/2000 CPU has the following enhancements.
• Additional control register
• Enhanced instructions
Note: * Not available in the H8S/2214 Group.
⎯ Eight 16-bit expanded registers, plus one 8-bit and two 32-bit control registers, have been
⎯ Normal mode * supports the same 64-kbyte address space as the H8/300 CPU
⎯ Advanced mode supports a maximum 16-Mbyte address space
⎯ The addressing modes have been enhanced to make effective use of the 16-Mbyte address
⎯ Addressing modes of bit-manipulation instructions have been enhanced
⎯ Signed multiply and divide instructions have been added
⎯ Two-bit shift instructions have been added
⎯ Instructions for saving and restoring multiple registers have been added
⎯ A test and set instruction has been added
⎯ Basic instructions execute twice as fast
⎯ One 8-bit and two 32-bit control registers have been added
⎯ Addressing modes of bit-manipulation instructions have been enhanced
⎯ Two-bit shift instructions have been added
⎯ Instructions for saving and restoring multiple registers have been added
⎯ A test and set instruction has been added
added
space
Differences from H8/300 CPU
Differences from H8/300H CPU
Rev.4.00 Sep. 18, 2008 Page 19 of 872
REJ09B0189-0400
Section 2 CPU