LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 273

• Manufacturer Part Number: LPC1343FHN33,551
• Description: IC MCU 32BIT 32KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4944; 935289655551

NXP Semiconductors
16.5 Operation
16.6 Register description
Table 266. Register overview: system tick timer (base address 0xE000 E000)
[1]
UM10375
User manual
Name
CTRL
LOAD
VAL
CALIB
Reset Value reflects the data stored in used bits only. It does not include content of reserved bits.
Access
R/W
R/W
R/W
RO
The System Tick Timer is a 24-bit timer that counts down to zero and generates an
interrupt. The intent is to provide a fixed 10 millisecond time interval between interrupts.
The System Tick Timer is clocked from the CPU clock. In order to generate recurring
interrupts at a specific interval, the LOAD register must be initialized with the correct value
for the desired interval.
The block diagram of the System Tick Timer is shown below in the
Fig 53. System tick timer block diagram
Address
offset
0x010
0x014
0x018
0x01C
system clock
Systick clock
All information provided in this document is subject to legal disclaimers.
Description
System Timer Control and status register
System Timer Reload value register
System Timer Current value register
System Timer Calibration value register
Rev. 2 — 7 July 2010
CLKSOURCE
COUNTFLAG
clock
24-bit down counter
load
STRELOAD
STCALIB
STCURR
STCTRL
load data
under-
flow
Chapter 16: LPC13xx System tick timer
TICKINT
enable
count
ENABLE
System Tick
interrupt
peripheral
private
bus
Figure
UM10375
© NXP B.V. 2010. All rights reserved.
Reset value
0x0000 0004
0x0
0x0
0x0
53.
275 of 333
[1]