LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 138
LPC1343FHN33,551
Manufacturer Part Number
LPC1343FHN33,551
Description
IC MCU 32BIT 32KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1343FHN33,551
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
33HVQFN EP
Device Core
ARM Cortex M3
Family Name
LPC1000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4944
935289655551
935289655551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1343FHN33,551
Manufacturer:
NXP
Quantity:
780
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NXP Semiconductors
9.11 Serial interface engine command description
UM10375
User manual
Table 167. USB Device FIQ Select register (USBDevFIQSel - address 0x4002 002C) bit
[1]
The functions and registers of the Serial Interface Engine (SIE) are accessed using
commands, which consist of a command code followed by optional data bytes (read or
write action). The USBCmdCode
used for these accesses.
A complete access consists of two phases:
An overview of the available commands is given in
Here is an example of the Read Current Frame Number command (reading 2 bytes):
USBDevIntClr = 0x30;
USBCmdCode = 0x00F50500;
while (!(USBDevIntSt & 0x10)); // Wait for CCEMPTY.
USBDevIntClr = 0x10;
USBCmdCode = 0x00F50200;
while (!(USBDevIntSt & 0x20)); // Wait for CDFULL.
USBDevIntClr = 0x20;
CurFrameNum = USBCmdData;
Bit
1
2
31:3
1. Command phase: the USBCmdCode register is written with the CMD_PHASE field
2. Data phase (optional): for writes, the USBCmdCode register is written with the
Remark: For logical endpoint 3 (physical endpoints 6 and 7) only.
set to the value 0x05 (Command), and the CMD_CODE field set to the desired
command code. On completion of the command, the CCEMPTY bit of USBDevIntSt is
set.
CMD_PHASE field set to the value 0x01 (Write), and the CMD_WDATA field set with
the desired write data. On completion of the write, the CCEMPTY bit of USBDevIntSt
is set. For reads, USBCmdCode register is written with the CMD_PHASE field set to
the value 0x02 (Read), and the CMD_CODE field set with command code the read
corresponds to. On completion of the read, the CDFULL bit of USBDevInSt will be set,
indicating the data is available for reading in the USBCmdData register. In the case of
multi-byte registers, the least significant byte is accessed first.
Symbol
BULKOUT
BULKIN
-
description
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
1
-
Rev. 2 — 7 July 2010
Description
Interrupt routing for bulk out endpoints
BULKOUT interrupt will be routed to the low-priority
interrupt line IRQ.
BULKOUT interrupt will be routed to the high-priority
interrupt line FIQ.
Interrupt routing for bulk in endpoints
BULKIN interrupt will be routed to the low-priority
interrupt line IRQ.
BULKIN interrupt will be routed to the high-priority
interrupt line FIQ.
Reserved
// Clear both CCEMPTY & CDFULL
// CMD_CODE=0xF5, CMD_PHASE=0x05(Command)
// Clear CCEMPTY interrupt bit.
// CMD_CODE=0xF5, CMD_PHASE=0x02(Read)
// Clear CDFULL.
// Read Frame number LSB byte.
(Table
160) and USBCmdData
Chapter 9: LPC13xx USB device controller
Table
168.
[1]
(Table
[1]
UM10375
© NXP B.V. 2010. All rights reserved.
161) registers are
140 of 333
Reset
value
0
0
-
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