C8051F131R Silicon Labs, C8051F131R Datasheet - Page 94

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
7.2.3. Settling Time Requirements
A minimum tracking time is required before an accurate conversion can be performed. This tracking time is
determined by the ADC2 MUX resistance, the ADC2 sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 7.3 shows the equivalent ADC2 input circuit.
The required ADC2 settling time for a given settling accuracy (SA) may be approximated by Equation 7.1.
Note: An absolute minimum settling time of 800 ns required after any MUX selection. In low-power tracking
mode, three SAR2 clocks are used for tracking at the start of every conversion. For most applications,
these three SAR2 clocks will meet the tracking requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (8).
94
TOTAL
AIN2.x
AIN2.y
is the sum of the ADC2 MUX resistance and any external source resistance.
RC
Differential Mode
MUX Select
MUX Select
Input
= R
MUX
Equation 7.1. ADC2 Settling Time Requirements
R
R
* C
MUX
MUX
SAMPLE
= 5k
Figure 7.3. ADC2 Equivalent Input Circuit
= 5k
Note: When the PGA gain is set to 0.5, C
t
C
C
=
SAMPLE
SAMPLE
ln
= 5pF
= 5pF


------ -
SA
2
n


Rev. 1.4

R
TOTAL
AIN2.x
C
SAMPLE
Single-Ended Mode
SAMPLE
RC
MUX Select
Input
= R
= 3pF
MUX
R
* C
MUX
SAMPLE
= 5k
C
SAMPLE
= 5pF