C8051F131R Silicon Labs, C8051F131R Datasheet - Page 193

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

To shut down the PLL, the system clock should be switched to the internal oscillator or a stable external
clock source, using the CLKSEL register. Next, disable the PLL by setting PLLEN (PLL0CN.1) to ‘0’.
Finally, the PLL can be powered off, by setting PLLPWR (PLL0CN.0) to ‘0’. Note that the PLLEN and
PLLPWR bits can be cleared at the same time.
Bits 7–5: UNUSED: Read = 000b; Write = don’t care.
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
R/W
Bit7
-
PLLCK: PLL Lock Flag.
0: PLL Frequency is not locked.
1: PLL Frequency is locked.
RESERVED. Must write to ‘0’.
PLLSRC: PLL Reference Clock Source Select Bit.
0: PLL Reference Clock Source is Internal Oscillator.
1: PLL Reference Clock Source is External Oscillator.
PLLEN: PLL Enable Bit.
0: PLL is held in reset.
1: PLL is enabled. PLLPWR must be ‘1’.
PLLPWR: PLL Power Enable.
0: PLL bias generator is de-activated. No static power is consumed.
1: PLL bias generator is active. Must be set for PLL to operate.
page 199
should be disabled whenever the FLRT bits are changed to a lower setting.
R/W
Bit6
-
). Important Note: Cache reads, cache writes, and the prefetch engine
SFR Definition 14.5. PLL0CN: PLL Control
R/W
Bit5
-
PLLLCK
Bit4
R
Rev. 1.4
R/W
Bit3
0
C8051F120/1/2/3/4/5/6/7
PLLSRC
R/W
Bit2
C8051F130/1/2/3
PLLEN
R/W
Bit1
SFR Address:
PLLPWR 00000000
SFR Page:
R/W
Bit0
0x89
F
Reset Value
193