C8051F131R Silicon Labs, C8051F131R Datasheet - Page 187
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C8051F131R
Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F133R.pdf
(350 pages)
Specifications of C8051F131R
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
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XTLVLD, in crystal mode software should delay at least 1 ms between enabling the external oscillator and
checking XTLVLD. RC and C modes typically require no startup time. The PLL also requires time to lock
onto the desired frequency, and the PLL Lock Flag (PLLLCK in register PLL0CN) is set to ‘1’ by hardware
once the PLL is locked on the correct frequency.
14.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crystal/
resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 14.1. In RC,
capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 and/or XTAL1
pin(s) as shown in Option 2, 3, or 4 of Figure 14.1. The type of external oscillator must be selected in the
OSCXCN register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Defini-
tion 14.4).
14.3. System Clock Selection
The CLKSL1-0 bits in register CLKSEL select which oscillator source generates the system clock.
CLKSL1-0 must be set to ‘01’ for the system clock to run from the external oscillator; however the external
oscillator may still clock certain peripherals, such as the timers and PCA, when the internal oscillator or the
PLL is selected as the system clock. The system clock may be switched on-the-fly between the internal
and external oscillators or the PLL, so long as the selected oscillator source is enabled and settled. The
internal oscillator requires little start-up time, and may be enabled and selected as the system clock in the
same write to OSCICN. External crystals and ceramic resonators typically require a start-up time before
they are settled and ready for use as the system clock. The Crystal Valid Flag (XTLVLD in register
OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To avoid reading a false
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
187
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