C8051F131R Silicon Labs, C8051F131R Datasheet - Page 289

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C8051F131R

Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F131R

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
21.1.2. Mode 1: 8-Bit UART, Variable Baud Rate
Mode 1 provides standard asynchronous, full duplex communication using a total of 10 bits per data byte:
one start bit, eight data bits (LSB first), and one stop bit. Data are transmitted from the TX0 pin and
received at the RX0 pin. On receive, the eight data bits are stored in SBUF0 and the stop bit goes into
RB80 (SCON0.2).
Data transmission begins when an instruction writes a data byte to the SBUF0 register. The TI0 Transmit
Interrupt Flag (SCON0.1) is set at the end of the transmission (the beginning of the stop-bit time). Data
reception can begin any time after the REN0 Receive Enable bit (SCON0.4) is set to logic 1. After the stop
bit is received, the data byte will be loaded into the SBUF0 receive register if the following conditions are
met: RI0 must be logic 0, and if SM20 is logic 1, the stop bit must be logic 1.
If these conditions are met, the eight bits of data is stored in SBUF0, the stop bit is stored in RB80 and the
RI0 flag is set. If these conditions are not met, SBUF0 and RB80 will not be loaded and the RI0 flag will not
be set. An interrupt will occur if enabled when either TI0 or RI0 are set.
The baud rate generated in Mode 1 is a function of timer overflow. UART0 can use Timer 1 operating in 8-
Bit Auto-Reload Mode , or Timer 2, 3, or 4 operating in Auto-reload Mode to generate the baud rate (note
that the TX and RX clocks are selected separately). On each timer overflow event (a rollover from all ones
- (0xFF for Timer 1, 0xFFFF for Timer 2, 3, or 4) - to zero) a clock is sent to the baud rate logic.
Timers 1, 2, 3, or 4 are selected as the baud rate source with bits in the SSTA0 register (see SFR Defini-
tion 21.2). The transmit baud rate clock is selected using the S0TCLK1 and S0TCLK0 bits, and the receive
baud rate clock is selected using the S0RCLK1 and S0RCLK0 bits.
When Timer 1 is selected as a baud rate source, the SMOD0 bit (SSTA0.4) selects whether or not to divide
the Timer 1 overflow rate by two. On reset, the SMOD0 bit is logic 0, thus selecting the lower speed baud
rate by default. The SMOD0 bit affects the baud rate generated by Timer 1 as shown in Equation 21.1.
The Mode 1 baud rate equations are shown below, where T1M is bit4 of register CKCON, TH1 is the 8-bit
reload register for Timer 1, and [RCAPnH , RCAPnL] is the 16-bit reload register for Timer 2, 3, or 4.
SPACE
MARK
BIT TIMES
BIT SAMPLING
When SMOD0 = 0:
When SMOD0 = 1:
START
BIT
Equation 21.1. Mode 1 Baud Rate using Timer 1
Figure 21.4. UART0 Mode 1 Timing Diagram
D0
Mode1_BaudRate
Mode1_BaudRate
D1
D2
Rev. 1.4
=
=
D3
1 32
1 16
C8051F120/1/2/3/4/5/6/7
D4
Timer1_OverflowRate
Timer1_OverflowRate
D5
C8051F130/1/2/3
D6
D7
STOP
BIT
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