C8051F131R Silicon Labs, C8051F131R Datasheet - Page 47

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

A10m/A2/P6.2
A11m/A3/P6.3
A12m/A4/P6.4
A13m/A5/P6.5
A14m/A6/P6.6
A15m/A7/P6.7
A8m/A0/P6.0
A9m/A1/P6.1
AD0/D0/P7.0
AD1/D1/P7.1
AD2/D2/P7.2
AD3/D3/P7.3
AD4/D4/P7.4
Name
‘F120
‘F122
‘F124
‘F126
80
79
78
77
76
75
74
73
72
71
70
69
68
Pin Numbers
‘F121
‘F123
‘F125
‘F127
Table 4.1. Pin Definitions (Continued)
‘F130
‘F132
80
79
78
77
76
75
74
73
72
71
70
69
68
‘F131
‘F133
Rev. 1.4
D I/O Bit 8 External Memory Address bus (Multiplexed
D I/O Port 6.1. See Port Input/Output section for com-
D I/O Port 6.2. See Port Input/Output section for com-
D I/O Port 6.3. See Port Input/Output section for com-
D I/O Port 6.4. See Port Input/Output section for com-
D I/O Port 6.5. See Port Input/Output section for com-
D I/O Port 6.6. See Port Input/Output section for com-
D I/O Port 6.7. See Port Input/Output section for com-
D I/O Bit 0 External Memory Address/Data bus (Multi-
D I/O Port 7.1. See Port Input/Output section for com-
D I/O Port 7.2. See Port Input/Output section for com-
D I/O Port 7.3. See Port Input/Output section for com-
D I/O Port 7.4. See Port Input/Output section for com-
Type
C8051F120/1/2/3/4/5/6/7
mode)
Bit 0 External Memory Address bus (Non-multi-
plexed mode)
Port 6.0
See Port Input/Output section for complete
description.
plete description.
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plexed mode)
Bit 0 External Memory Data bus (Non-multi-
plexed mode)
Port 7.0
See Port Input/Output section for complete
description.
plete description.
plete description.
plete description.
plete description.
C8051F130/1/2/3
Description
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